I then replaced the radeon DDX's use of indirect buffers for accel operations with a really naive TTM implementation in order to prove my backend actually was useful...
So I now have my rs480 using TTM to allocate the indirect buffers really badly but X looks fine and seems stable and the buffers are being fenced, so I'm happier that my backend and fence code in the kernel driver is actually mostly useable..
The indirect buffers would be more correctly done with a pool of drm buffers so don't spend quite so much time jumping into the kernel to get a new buffer.
I'm running out of excuses for doing some work on the Mesa driver to support some of this stuff...